1. Field of the invention
The invention concerns a device for increasing the operational security of a duplicated clock. A duplicated clock is used, for example, in telecommunication exchanges to control a peripheral. It comprises two clocks each of which generates timing signals required to control the units of the peripheral.
2. Description of the prior art
In the case of a telecommunication exchange, each clock is generally controlled by three high-reliability timebases, each of which outputs a clock signal and a synchronization signal. Each clock generally receives the three clock signals from the three timebases via a first majority logic circuit which produces a majority signal from which the clock generates the timing signals to be output to the peripheral, the majority clock signal also being usable within the peripheral to control certain units.
Each clock of a duplicated clock also receives, for example, the three synchronization signals from the three timebases via a second majority logic circuit which produces a majority synchronization signal which is recognized by the majority clock signal.
The majority clock signal is generally filtered and shaped by a filter and signal shaping circuit before it is used to generate the timing signals and for purposes of recognition of the majority synchronization signal.
One clock of a duplicated clock is connected to some units of the peripheral, the other clock being connected to other units of the same peripheral. Should one clock fail, the peripheral is rendered inoperative, irrespective of the level within the clock at which the failure has occurred. Moreover, the clock signals obtained at the output of the filter and signal shaping circuit of each clock may be out of phase. This phase difference also affects the timing signals produced by each clock, which may be prejudicial to correct operation of the peripheral and render it inoperative when the phase difference is of excessive magnitude.
The objective of the present invention is to increase the operational security of a duplicated clock and thereby to reduce the causes for failure of a peripheral, or more generally of the device to which it supplies timing signals.